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74LCX38 Low Voltage Quad 2-Input NAND Gate (Open Drain) with 5V Tolerant Inputs
October 1995 Revised February 2002
74LCX38 Low Voltage Quad 2-Input NAND Gate (Open Drain) with 5V Tolerant Inputs
General Description
The LCX38 contains four 2-input open drain NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX38 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.
Features
s 5V tolerant inputs s 2.3V to 3.6V VCC specifications provided s 5.0 ns tPD max (VCC = 3.3V), 10 A ICC max s Power down high impedance inputs and outputs s 24 mA output drive (VCC = 3.0V) s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performance: Human body model > 2000V Machine model > 150V
Ordering Code:
Order Number 74LCX38M 74LCX38SJ 74LCX38MTC Package Number M14A M14D MTC14 Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names An , Bn On Description Inputs Outputs
(c) 2002 Fairchild Semiconductor Corporation
DS012574
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74LCX38
Absolute Maximum Ratings(Note 1)
Symbol VCC VI VO IIK IOK IO ICC IGND TSTG Parameter Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Sink Current (IOL) DC Supply Current per Supply Pin DC Ground Current per Ground Pin Storage Temperature Value Conditions Units V V Output in HIGH or LOW State (Note 2) VI < GND VO < GND V mA mA mA mA mA
-0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -50 -50 +50 100 100 -65 to +150
C
Recommended Operating Conditions (Note 3)
Symbol VCC VI VO IOL Supply Voltage Input Voltage Output Voltage Output Current VCC = 3.0V - 3.6V VCC = 2.7V - 3.0V VCC = 2.3V - 2.7V TA Free-Air Operating Temperature Input Edge Rate, VIN = 0.8V-2.0V, VCC = 3.0V Parameter Operating Data Retention Min 2.0 1.5 0 0 Max 3.6 3.6 5.5 5.5 24 12 8 mA Units V V V
-40
0
85 10
C
ns/V
t/V
Note 1: The Absolute Maximum Ratings are those beyond which the safety of the device cannot be guaranteed. The device should not be operating at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 2: IO Absolute Maximum Rating must be observed. Note 3: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol VIH VIL VOL Parameter HIGH Level Input Voltage LOW Level Input Voltage LOW Level Output Voltage IOL = 100A IOL = 8mA IOL = 12 mA IOL = 16 mA IOL = 24 mA II IOFF ICC ICC IOHZ Input Leakage Current Power-Off Leakage Current Quiescent Supply Current Increase in ICC per Input Off State Current 0 VI 5.5V VI or VO = 5.5V VI = VCC or GND 3.6V VI 5.5V VIH = VCC -0.6V VO = 5.5 Conditions VCC (V) 2.3 - 2.7 2.7 - 3.6 2.3 - 2.7 2.3 - 3.6 2.3 - 3.6 2.3 2.7 3.0 3.0 2.3 - 3.6 0 2.3 - 3.6 2.3 - 3.6 2.3 - 3.6 2 - 3.6 TA = -40C to +85C Min 1.7 2.0 0.7 0.8 0.2 0.6 0.4 0.4 0.55 5.0 10 10 10 500 10 A A A A A V Max Units V V
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74LCX38
AC Electrical Characteristics
TA = -40C to +85C, RL = 500 Symbol Parameter VCC = 3.3V 0.3V CL= 50 pF Min tPZL tPLZ tOSHL tOSLH Output to Output Skew (Note 4) Propagation Delay Time 1.5 1.5 Max 5.0 5.0 1.0 1.0 VCC = 2.7V CL = 50 pF Min 1.5 1.5 Max 5.5 5.5 VCC = 2.5V 0.2V CL = 30 pF Min 1.5 1.5 Max 6.5 6.0 ns ns Units
Note 4: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
Dynamic Switching Characteristics
Symbol VOLP VOLV Parameter Quiet Output Dynamic Peak VOL Quiet Output Dynamic Valley VOL Conditions CL = 50 pF, VIH = 3.3V, VIL = 0V CL = 30 pF, VIH = 2.5V, VIL = 0V CL = 50 pF, VIH = 3.3V, VIL = 0V CL = 30 pF, VIH = 2.5V, VIL = 0V VCC (V) 3.3 2.5 3.3 2.5 TA = 25C Typical 0.8 0.6 -0.8 -0.6 Units V V
Capacitance
Symbol CIN COUT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance Parameter Conditions VCC = Open, VI = 0V or VCC VCC = 3.3V, VI = 0V or VCC VCC = 3.3V, VI = 0V or VCC, f = 10 MHz Typical 7 8 25 Units pF pF pF
3
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74LCX38
AC Loading and Waveforms Generic for LCX Family
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance) Test tPZL, tPLZ Switch 6V at VCC = 3.3 0.3V VCC x 2 at VCC = 2.5 0.2V
3-STATE Output Low Enable and Disable Times for Logic FIGURE 2. Waveforms
trise and tfall
(Input Pulse Characteristics; f = 1MHz, tr = tf = 3ns) Symbol Vmi Vmo Vx Vy VCC 3.3V 0.3V 1.5V 1.5V VOL + 0.3V VOH - 0.3V 2.7V 1.5V 1.5V VOL + 0.3V VOH - 0.3V 2.5V 0.2V VCC/2 VCC/2 VOL + 0.15V VOH - 0.15V
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74LCX38
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A
5
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74LCX38
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D
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74LCX38 Low Voltage Quad 2-Input NAND Gate (Open Drain) with 5V Tolerant Inputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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